Improper initialization of x87 and SSE floating-point configuration registers in the __scone_entry component of SCONE before 5.8.0 for Intel SGX allows a local attacker to compromise the execution integrity of floating-point operations in an enclave or access sensitive information via side-channel analysis.
Conclusion & alert: CVE-2022-46487 is rated Exploit Available (59.7/100): CVSS High severity, with low exploitation likelihood (EPSS 0.17%). Core evidence: 2 public exploit reference(s) are indexed (Exploit-DB). Mandatory action: Public exploits are available—assess exposure, apply mitigations, and prioritize patching.
Risk is dynamic; we continuously reassess and refresh what is shown on this page as upstream context changes.
| EDB-ID | Source | Kind | Published | Link |
|---|---|---|---|---|
| — | nvd_ref | exploit_tag | Exploit-DB ↗ | |
| — | nvd_ref | exploit_tag | Exploit-DB ↗ |
EPSS lead: Daily EPSS estimates relative likelihood of exploitation; percentile ranks this CVE among scored vulnerabilities (higher = more severe relative rank).
| # | Date | Old EPSS score | New EPSS score | Delta (New - Old) |
|---|---|---|---|---|
| 1 | 2025-11-09 | 0.09% | 0.17% | +0.08% |
| 2 | 2025-03-30 | 0.17% | 0.09% | -0.08% |
| 3 | 2025-03-29 | — | 0.17% | — |
Full EPSS history (5 records total)
CVSS metrics for this CVE.
| Base score | Version | Severity | Vector | Exploitability | Impact | Score source |
|---|---|---|---|---|---|---|
| 7.8 | 3.1 | HIGH |
|
1.8 | 5.9 | [email protected] |
| 7.8 | 3.1 | HIGH |
|
1.8 | 5.9 | 134c704f-9b21-4f2e-91b3-4a467353bcc0 |
| URL | Tags |
|---|---|
| https://jovanbulck.github.io/files/acsac20-fpu.pdf | Exploit Third Party Advisory |
| https://jovanbulck.github.io/files/oakland24-pandora.pdf | Exploit Third Party Advisory |
| https://nvd.nist.gov/vuln/detail/CVE-2020-0561#vulnCurrentDescriptionTitle | Third Party Advisory US Government Resource |
| https://nvd.nist.gov/vuln/detail/CVE-2020-15107 | Third Party Advisory US Government Resource |
| https://sconedocs.github.io/release5.7/ | Release Notes |
| https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/best-practices/data-operand-independent-timing-isa-guidance.html#inpage-nav-3-3 | Technical Description |