CWE-1189 6 CVEs MITRE definition ↗

CWE-1189: Improper Isolation of Shared Resources on System-on-a-Chip (SoC)

Overview

CWE-1189 (Improper Isolation of Shared Resources on System-on-a-Chip (SoC)) documents a weakness type used across vulnerability databases and security assessments. Use the sections below for definition, context, and mapped CVEs.

Security impact
Security impact: Depends on product and context; use CVE records, severity scores, and MITRE guidance to prioritize.

Description

The System-On-a-Chip (SoC) does not properly isolate shared resources between trusted and untrusted agents.

Applicable platforms

Kind Name Class Prevalence OS / CPE
language Not Language-Specific Undetermined
technology System on Chip Undetermined

Related CVEs in this database

These CVEs are mapped to this weakness in this database and kept for traceability and search.

CVE Published Summary
CVE-2025-54518 2026-05-15 Improper isolation of shared resources within the CPU operation cache on Zen 2-based products could allow an attacker to corrupt instructions executed at a different privilege level, potentially resul…
CVE-2024-36332 2026-05-15 Improper isolation of GPU HW register space could allow a privileged attacker in malicious Guest Virtual Machine (VM) to perform unauthorized access to specific victim range of GPU MMIO register space…
CVE-2025-54514 2026-02-10 Improper isolation of shared resources on a system on a chip by a malicious local attacker with high privileges could potentially lead to a partial loss of integrity.
CVE-2023-31325 2025-09-06 Improper isolation of shared resources on System-on-a-chip (SOC) could a privileged attacker to tamper with the contents of the PSP reserved DRAM region potentially resulting in loss of confidentialit…
CVE-2023-49141 2024-08-14 Improper isolation in some Intel(R) Processors stream cache mechanism may allow an authenticated user to potentially enable escalation of privilege via local access.
CVE-2023-42667 2024-08-14 Improper isolation in the Intel(R) Core(TM) Ultra Processor stream cache mechanism may allow an authenticated user to potentially enable escalation of privilege via local access.

Previous names

  • Improper Isolation of Shared Resources on System-on-Chip (SoC) (2020-08-20)

Content submission

Name
Arun Kanuparthi, Hareesh Khattri, Parbati Kumar Manna, Narasimha Kumar V Mangipudi
Organization
Intel Corporation
Date
2019-10-15
Version
4.0

Content modifications

Date Name Version Importance Comment
2020-08-20 CWE Content Team 4.2 updated Common_Consequences, Description, Name, Potential_Mitigations, Related_Attack_Patterns, Relationships
2020-12-10 CWE Content Team 4.3 updated Relationships
2021-07-20 CWE Content Team 4.5 updated Demonstrative_Examples
2021-10-28 CWE Content Team 4.6 updated Description, Observed_Examples, References, Relationships, Weakness_Ordinalities
2022-10-13 CWE Content Team 4.9 updated Detection_Factors
2023-04-27 CWE Content Team 4.11 updated Observed_Examples, Relationships
2023-06-29 CWE Content Team 4.12 updated Mapping_Notes, Relationships
2025-04-03 CWE Content Team 4.17 updated Demonstrative_Examples
2025-09-09 CWE Content Team 4.18 updated Relationships

Contributions

Type Name Date Comment
Content 2021-07-16 Provided Demonstrative Example for Hardware Root of Trust.
Content Hareesh Khattri 2021-10-22 provided observed example
Content Hareesh Khattri 2022-04-18 changed detection method
cvelogic Threat Intelligence