intel celeron_n2840 CVE Vulnerabilities (9)

CVEs: 9 CPE versions: View versions table

Summary

This page lists publicly disclosed CVE vulnerabilities affecting intel celeron_n2840 (linked via NVD CPE). Each row includes severity scores, summaries, and publication dates to help identify and analyze security issues.

Showing 19 of 9 CVEs
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CVE Summary Source Max CVSS EPSS % Published Updated
CVE-2021-0158 Improper input validation in the BIOS firmware for some Intel(R) Processors may allow a privileged user to potentially enable escalation of privilege via local access. [email protected] 6.7 3.02% 2021-11-17 2024-11-21
CVE-2021-0157 Insufficient control flow management in the BIOS firmware for some Intel(R) Processors may allow a privileged user to potentially enable escalation of privilege via local access. [email protected] 6.7 3.09% 2021-11-17 2024-11-21
CVE-2020-24489 Incomplete cleanup in some Intel(R) VT-d products may allow an authenticated user to potentially enable escalation of privilege via local access. [email protected] 8.8 0.36% 2021-06-09 2024-11-21
CVE-2020-0559 Insecure inherited permissions in some Intel(R) PROSet/Wireless WiFi products on Windows* 7 and 8.1 before version 21.40.5.1 may allow an authenticated user to potentially enable escalation of privilege via local access. [email protected] 7.8 0.29% 2020-08-13 2024-11-21
CVE-2020-0551 Load value injection in some Intel(R) Processors utilizing speculative execution may allow an authenticated user to potentially enable information disclosure via a side channel with local access. The list of affected products is provided in intel-sa-00334: https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00334.html [email protected] 5.6 1.04% 2020-03-12 2024-11-21
CVE-2017-5703 Configuration of SPI Flash in platforms based on multiple Intel platforms allow a local attacker to alter the behavior of the SPI flash potentially leading to a Denial of Service. [email protected] 6.0 0.36% 2018-04-03 2024-11-21
CVE-2017-5927 Page table walks conducted by the MMU during virtual to physical address translation leave a trace in the last level cache of modern ARM processors. By performing a side-channel attack on the MMU operations, it is possible to leak data and code pointers from JavaScript, breaking ASLR. [email protected] 7.5 1.58% 2017-02-27 2026-05-13
CVE-2017-5926 Page table walks conducted by the MMU during virtual to physical address translation leave a trace in the last level cache of modern AMD processors. By performing a side-channel attack on the MMU operations, it is possible to leak data and code pointers from JavaScript, breaking ASLR. [email protected] 7.5 1.58% 2017-02-27 2026-05-13
CVE-2017-5925 Page table walks conducted by the MMU during virtual to physical address translation leave a trace in the last level cache of modern Intel processors. By performing a side-channel attack on the MMU operations, it is possible to leak data and code pointers from JavaScript, breaking ASLR. [email protected] 7.5 1.58% 2017-02-27 2026-05-13
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