CWE-1342 (Information Exposure through Microarchitectural State after Transient Execution) documents a weakness type used across vulnerability databases and security assessments. Use the sections below for definition, context, and mapped CVEs.
The processor does not properly clear microarchitectural state after incorrect microcode assists or speculative execution, resulting in transient execution.
| Kind | Name | Class | Prevalence | OS / CPE |
|---|---|---|---|---|
| language | — | Not Language-Specific | Undetermined | — |
| operating_system | — | Not OS-Specific | Undetermined | — |
| architecture | — | Workstation | Undetermined | — |
| architecture | x86 | — | Undetermined | — |
| architecture | ARM | — | Undetermined | — |
| architecture | Other | — | Undetermined | — |
| technology | — | Not Technology-Specific | Undetermined | — |
| technology | — | System on Chip | Undetermined | — |
These CVEs are mapped to this weakness in this database and kept for traceability and search.
| CVE | Published | Summary |
|---|---|---|
| CVE-2023-28746 | 2024-03-14 | Information exposure through microarchitectural state after transient execution from some register files for some Intel(R) Atom(R) Processors may allow an authenticated user to potentially enable info… |
| CVE-2022-40982 | 2023-08-10 | Information exposure through microarchitectural state after transient execution in certain vector execution units for some Intel(R) Processors may allow an authenticated user to potentially enable inf… |
| Date | Name | Version | Importance | Comment |
|---|---|---|---|---|
| 2022-10-13 | CWE Content Team | 4.9 | — | updated Demonstrative_Examples, Maintenance_Notes, Related_Attack_Patterns |
| 2023-04-27 | CWE Content Team | 4.11 | — | updated Relationships |
| 2023-06-29 | CWE Content Team | 4.12 | — | updated Mapping_Notes |
| 2024-02-29 | CWE Content Team | 4.14 | — | updated Description |
| 2025-12-11 | CWE Content Team | 4.19 | — | updated Weakness_Ordinalities |